Linux Capable SoC FPGA Prototyping Platform with DDR Memory

Description

This project aims to leverage the Corstone-1000 platform to host and support a custom research accelerator. The main deliverables include prototyping the accelerator in FPGA and then creating a physical silicon implementation using a pre-verified programmable control system. The project will provide practical experience in SoC design, FPGA prototyping, and hardware acceleration. The final output will be a functional SoC FPGA prototyping platform with DDR memory, capable of running Linux and demonstrating the feasibility and performance of the design. To undertake this project, please reach out to SoC Labs in this link.

Hardware / Software Requirements

• Languages: Verilog, SystemVerilog
• Tooling: Vivado, ModelSim, ASIC design tools
• Hardware: FPGA development board (e.g., Xilinx or Altera), Corstone-1000 platform
• IP access: Arm Academic Access member (link to get if they don’t have it)

Resources

• SoC Labs, community for Arm-based software development

Benefits / Prizes

1. Standout projects could be internally referred for relevant positions at Arm!